View IR2184_7515733.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

IR2184 ( 4 )( s ) & (pbf) typical connection half-bridge driver features ? floating channel designed for bootstrap operation fully operational to +600v tolerant to negative transient voltage dv/dt immune ? gate drive supply range from 10 to 20v ? undervoltage lockout for both channels ? 3.3v and 5v input logic compatible ? matched propagation delay for both channels ? logic and power ground +/- 5v offset. ? lower di/dt gate driver for better noise immunity ? output source/sink current capability 1.4a/1.8a ? also available lead-free (pbf) IR21844 IR2184 www.irf.com 1 data sheet no. pd60174 revg (refer to lead assignments for correct configuration). this/these diagram(s) show electrical connections only. please refer to our application notes and designtips for proper circuit board layout. packages 14-lead pdip IR21844 8-lead soic IR2184s 14-lead soic IR21844s 8-lead pdip IR2184 description the IR2184(4)(s) are high voltage, high speed power mosfet and igbt drivers with dependent high and low side referenced output channels. pro- prietary hvic and latch immune cmos technologies enable rugge- dized monolithic construction. the logic input is compatible with standard cmos or lsttl output, down to 3.3v logic. the output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. the floating channel can be used to drive an n-channel power mosfet or igbt in the high side configuration which operates up to 600 volts. ir2181/ir2183/IR2184 feature comparison
IR2184 ( 4 )(s) & (pbf) 2 www.irf.com symbol definition min. max. units v b high side floating absolute voltage -0.3 625 v s high side floating supply offset voltage v b - 25 v b + 0.3 v ho high side floating output voltage v s - 0.3 v b + 0.3 v cc low side and logic fixed supply voltage -0.3 25 v lo low side output voltage -0.3 v cc + 0.3 dt programmable dead-time pin voltage (IR21844 only) v ss - 0.3 v cc + 0.3 v in logic input voltage (in & sd) v ss - 0.3 v ss + 10 v ss logic ground (IR21844 only) v cc - 25 v cc + 0.3 dv s /dt allowable offset supply voltage transient 50 v/ns p d package power dissipation @ t a +25 c (8-lead pdip) 1.0 (8-lead soic) 0.625 (14-lead pdip) 1.6 (14-lead soic) 1.0 rth ja thermal resistance, junction to ambient (8-l ead pdip) 125 (8-lead soic) 200 (14-lead pdip) 75 (14-lead soic) 120 t j junction temperature 150 t s storage temperature -50 150 t l lead temperature (soldering, 10 seconds) 300 v c c/w w absolute maximum ratings absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. all voltage parameters are absolute voltages referenced to com. the thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. recommended operating conditions the input/output logic timing diagram is shown in figure 1. for proper operation the device should be used within the recommended conditions. the v s and v ss offset rating are tested with all supplies biased at 15v differential. note 1: logic operational for v s of -5 to +600v. logic state held for v s of -5v to -v bs . (please refer to the design tip dt97-3 for more details). note 2: in and sd are internally clamped with a 5.2v zener diode. vb high side floating supply absolute voltage v s + 10 v s + 20 v s high side floating supply offset voltage note 1 600 v ho high side floating output voltage v s v b v cc low side and logic fixed supply voltage 10 20 v lo low side output voltage 0 v cc v in logic input voltage (in & sd) v ss v ss + 5 dt programmable dead-time pin voltage (IR21844 only) v ss v cc v ss logic ground (IR21844 only) -5 5 t a ambient temperature -40 125 c v symbol definition min. max. units
IR2184 ( 4 )(s) & (pbf) www.irf.com 3 dynamic electrical characteristics v bias (v cc , v bs ) = 15v, v ss = com, c l = 1000 pf, t a = 25 c, dt = vss unless otherwise specified. symbol definition min. typ. max. units test conditions t on turn-on propagation delay 680 900 v s = 0v t off turn-off propagation delay 270 400 v s = 0v or 600v t sd shut-down propagation delay 180 270 mton delay matching, hs & ls turn-on 0 90 mtoff delay matching, hs & ls turn-off 0 40 t r turn-on rise time 40 60 v s = 0v t f turn-off fall time 20 35 v s = 0v dt deadtime: lo turn-off to ho turn-on(dt lo-ho) & 280 400 520 rdt= 0 ho turn-off to lo turn-on (dt ho-lo) 456 sec rdt = 200k mdt deadtime matching = dt lo - ho - dt ho-lo 0 50 rdt=0 0 600 rdt = 200k nsec nsec static electrical characteristics v bias (v cc , v bs ) = 15v, v ss = com, dt= v ss and t a = 25 c unless otherwise specified. the v il , v ih and i in parameters are referenced to v ss /com and are applicable to the respective input leads: in and sd. the v o , i o and ron parameters are referenced to com and are applicable to the respective output leads: ho and lo. symbol definition min. typ. max. units test conditions v ih logic 1 input voltage for ho & logic 0 for lo 2.7 v cc = 10v to 20v v il logic 0 input voltage for ho & logic 1 for lo 0.8 v cc = 10v to 20v v sd,th+ sd input positive going threshold 2.7 v cc = 10v to 20v v sd,th- sd input negative going threshold 0.8 v cc = 10v to 20v v oh high level output voltage, v bias - v o 1.2 i o = 0a v ol low level output voltage, v o 0.1 i o = 0a i lk offset supply leakage current 50 v b = v s = 600v i qbs quiescent v bs supply current 20 60 150 v in = 0v or 5v i qcc quiescent v cc supply current 0.4 1.0 1.6 ma v in = 0v or 5v i in+ logic 1 input bias current 25 60 in = 5v, sd = 0v i in- logic 0 input bias current 1.0 in = 0v, sd = 5v v ccuv+ v cc and v bs supply undervoltage positive going 8.0 8.9 9.8 v bsuv+ threshold v ccuv- v cc and v bs supply undervoltage negative going 7.4 8.2 9.0 v bsuv- threshold v ccuvh hysteresis 0.3 0.7 v bsuvh i o+ output high short circuit pulsed current 1.4 1.9 v o = 0v, pw 10 s i o- output low short circuit pulsed current 1.8 2.3 v o = 15v, pw 10 s v a a v a
IR2184 ( 4 )(s) & (pbf) 4 www.irf.com functional block diagrams 2184 sd uv detect delay in vs ho vb pulse filter hv level shifter r r s q uv detect pulse generator vss/com level shift vss/com level shift +5v deadtime com lo vcc 21844 sd uv detect delay in dt vss vs ho vb pulse filter hv level shifter r r s q uv detect pulse generator vss/com level shift vss/com level shift +5v deadtime com lo vcc
IR2184 ( 4 )(s) & (pbf) www.irf.com 5 14-lead pdip 14-lead soic IR21844 IR21844s lead assignments 8-lead pdip 8-lead soic lead definitions symbol description in logic input for high and low side gate driver outputs (ho and lo), in phase with ho (referenced to com for IR2184 and vss for IR21844) sd logic input for shutdown (referenced to com for IR2184 and vss for IR21844) dt programmable dead-time lead, referenced to vss. (ir21 84 4 only) vss logic ground (21 84 4 only) v b high side floating supply ho high side gate drive output v s high side floating supply return v cc low side and logic fixed supply lo low side gate drive output com low side return IR2184 IR2184s 1 2 3 4 8 7 6 5 in sd com lo v b ho v s v cc 1 2 3 4 8 7 6 5 in sd com lo v b ho v s v cc 1 2 3 4 5 6 7 1 4 13 12 11 10 9 8 in sd vss dt com lo v cc v b ho v s 1 2 3 4 5 6 7 1 4 13 12 11 10 9 8 in sd vss dt com lo v cc v b ho v s
IR2184 ( 4 )(s) & (pbf) 6 www.irf.com figure 1. input/output timing diagram figure 2. switching time waveform definitions figure 5. delay matching waveform definitions figure 3. shutdown waveform definitions figure 4. deadtime waveform definitions
IR2184 ( 4 )(s) & (pbf) www.irf.com 7 400 600 800 1000 1200 1400 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-on propagation delay (ns) typ. max. figure 4a. turn-on propagation delay vs. temperature 400 600 800 1000 1200 1400 10 12 14 16 18 20 supply voltage (v) turn-on propagation delay (ns) figure4b. turn-on propagation delay vs. supply voltage typ. max. 100 200 300 400 500 600 700 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-off propagation delay (ns) typ. max. figure 5a. turn-off propagation delay vs. temperature 100 200 300 400 500 600 700 10 12 14 16 18 20 supply voltage (v) turn-off propagation delay (ns) figure 5b. turn-off propagation delay vs. supply voltage typ. max.
IR2184 ( 4 )(s) & (pbf) 8 www.irf.com 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) sd propagation delay (ns) typ. max. figure 6a. sd propagation delay vs. temperature 0 100 200 300 400 500 10 12 14 16 18 20 supply voltage (v) sd propagation delay (ns) figure 6b. sd propagation delay vs. supply voltage max. typ. 0 20 40 60 80 100 120 -50-25 0 255075100125 temperature ( o c) turn-on rise time (ns) typ. max. figure 7a. turn-on rise time vs. temperature 0 20 40 60 80 100 120 10 12 14 16 18 20 supply voltage (v) turn-on rise time (ns) figure 7b. turn-on rise time vs. supply voltage typ. max.
IR2184 ( 4 )(s) & (pbf) www.irf.com 9 0 20 40 60 80 -50 -25 0 25 50 75 100 125 temperature ( o c) turn-off fall time (ns) typ max. figure 8a. turn-off fall time vs. temperature 0 20 40 60 80 10 12 14 16 18 20 supply voltage (v) turn-off fall time (ns) figure 8b. turn-off fall time vs. supply voltage typ. max. 100 300 500 700 900 1100 -50 -25 0 25 50 75 100 125 temperature ( o c) deadtime (ns) mi n. figure 9a. deadtime vs. temperature typ. max. 100 300 500 700 900 1100 10 12 14 16 18 20 supply voltage (v) deaduime (ns) figure 9b. deadtime vs. supply voltage typ. max. mi n.
IR2184 ( 4 )(s) & (pbf) 10 www.irf.com 0 1 2 3 4 5 6 7 0 50 100 150 200 r dt (k ) deadtime ( s) figure 9c. deadtime vs. r dt typ. max. mi n. 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 temperature ( o c) logic "1" input voltage (v) mi n. figure 10a. logic "1" input voltage vs. temperature 0 1 2 3 4 5 6 10 12 14 16 18 20 supply voltage (v) logic "1" input voltage (v) figure 10b. logic "1" input voltage vs. supply voltage mi n. 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 temperature ( o c) logic "0" input voltage (v) max. figure 11a. logic "0" input voltage vs. temperature
IR2184 ( 4 )(s) & (pbf) www.irf.com 11 0 1 2 3 4 5 6 10 12 14 16 18 20 supply voltage (v) logic "0" input voltage (v) figure 11b. logic "0" input voltage vs. supply voltage max. 0 1 2 3 4 5 6 -50 -25 0 25 50 75 100 125 temperature ( o c) sd input positive going threshold (v) mi n. figure 12a. sd input positive going threshold vs. temperature 0 1 2 3 4 5 6 10 12 14 16 18 20 supply voltage (v) sd input positive going threshold (v) figure 12b. sd input positive going threshold vs. supply voltage mi n. 0 1 2 3 4 5 -50 -25 0 25 50 75 100 125 temperature ( o c) sd input negative going threshold (v) max. figure 13a. sd input negative going threshold vs. temperature
IR2184 ( 4 )(s) & (pbf) 12 www.irf.com 0 1 2 3 4 5 10 12 14 16 18 20 supply voltage (v) sd input negative going threshold (v) figure 13b. sd input negative going threshold vs. supply voltage max. 0 1 2 3 4 5 -50 -25 0 25 50 75 100 125 temperature ( o c) high level output (v) max. figure 14a. high level output vs. temperature 0 1 2 3 4 5 10 12 14 16 18 20 supply voltage (v) high level output (v) figure 14b. high level output vs. supply voltage max. 0.0 0.1 0.2 0.3 0.4 0.5 -50 -25 0 25 50 75 100 125 temperature ( o c) low level output (v) max. figure 15a. low level output vs. temperature
IR2184 ( 4 )(s) & (pbf) www.irf.com 13 0.0 0.1 0.2 0.3 0.4 0.5 10 12 14 16 18 20 supply voltage (v) low level output (v) figure 15b. low level output vs. supply voltage max. 0 100 200 300 400 500 -50 -25 0 25 50 75 100 125 temperature ( o c) offset s upply leakage current ( a) max. figure 16a. offset supply leakage current vs. temperature 0 100 200 300 400 500 100 200 300 400 500 600 v b boost voltage (v) offset supply leak age current ( a) figure 16b. offset supply leakage current vs. v b boost voltage max. 0 50 100 150 200 250 -50 -25 0 25 50 75 100 125 temperature ( o c) v bs supply current ( a) mi n. figur e 17a. v bs supply current vs. temperature typ. max.
IR2184 ( 4 )(s) & (pbf) 14 www.irf.com 0 50 100 150 200 250 10 12 14 16 18 20 v bs floating supply voltage (v) v bs supply current ( a) figur e 17b. v bs supply current vs. v bs floating supply voltage typ. max. mi n. 0 1 2 3 4 5 -50 -25 0 25 50 75 100 125 temperature ( o c) v cc supply current (ma) mi n. figur e 18a. v cc supply current vs. temperature typ. max. 0 1 2 3 4 5 10 12 14 16 18 20 v cc supply voltage (v) v cc supply current (ma) figure 18b. v cc supply current vs. v cc supply voltage typ. max. mi n. 0 20 40 60 80 100 120 -50 -25 0 25 50 75 100 125 temperature ( o c) logic "1" input bias current ( a) figure 19a. logic "1" input bias current vs. temperature typ. max.
IR2184 ( 4 )(s) & (pbf) www.irf.com 15 0 20 40 60 80 100 120 10 12 14 16 18 20 supply voltage (v) logic "1" input bias current ( a) figure 19b. logic "1" input bias current vs. supply voltage typ. max. 0 1 2 3 4 5 -50 -25 0 25 50 75 100 125 temperature ( o c) logic "0" input bias current ( a) max. figure 20a. logic "0" input bias current vs. temperature 0 1 2 3 4 5 10 12 14 16 18 20 supply voltage (v) logic "0" input bias current ( a) figure 20b. logic "0" input bias current vs. supply voltage max. 6 7 8 9 10 11 12 -50 -25 0 25 50 75 100 125 temperature ( o c) v cc and v bs uv threshold (+) (v) mi n. figure 21. v cc and v bs undervoltage threshold (+) vs. temperature typ. max.
IR2184 ( 4 )(s) & (pbf) 16 www.irf.com 6 7 8 9 10 11 12 -50 -25 0 25 50 75 100 125 temperature ( o c) v cc and v bs uvthreshold (-) (v) mi n. figure 22. v cc and v bs undervoltage threshold (-) vs. temperature typ. max. 0 1 2 3 4 5 -50 -25 0 25 50 75 100 125 temperature ( o c) output source current (a) mi n. figure 23a. output source current vs. temperature typ. 0 1 2 3 4 5 10 12 14 16 18 20 supply voltage (v) output source current (a) figure 23b. output source current vs. supply voltage typ. mi n. 1.0 2.0 3.0 4.0 5.0 -50 -25 0 25 50 75 100 125 temperature ( o c) output sink current (a) mi n. figure 24a. output sink current vs. temperature typ.
IR2184 ( 4 )(s) & (pbf) www.irf.com 17 0 1 2 3 4 5 10 12 14 16 18 20 supply voltage (v) output sink current (a) figure 24b. output sink current vs. supply voltage typ. mi n. 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temprature ( o c) 140v 70v 0v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v fi gure 21. i r 2181 vs . frequency (i rfbc 20), r gate =33 ? , v cc =15v fi gure 22. i r 2181 vs. frequency (i rfbc30), r gate =22 ? , v cc =15v fi gure 23. i r 2181 vs. frequency (i rfbc40), r gate =15 ? , v cc =15v
IR2184 ( 4 )(s) & (pbf) 18 www.irf.com 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 70v 0v 140v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v fi gure 24. i r 2181 vs . frequency (i rfpe50), r gate =10 ? , v cc =15v fi gure 25. i r 21814 vs. frequency (i rfbc20), r gate =33 ? , v cc =15v fi gure 26. i r 21814 vs . frequency (i rfbc 30), r gate =22 ? , v cc =15v fi gure 27. i r 21814 vs. frequency (i rfbc 40), r gate =15 ? , v cc =15v
IR2184 ( 4 )(s) & (pbf) www.irf.com 19 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 70v 0v 14 0 v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 0v 14 0 v 70v fi gure 28. i r 21814 vs. fre qu ency (i rfpe50), r g ate =10 ? , v cc =15v fi gure 29. i r 2181s vs . frequency (i rfbc 20), r gate =33 ? , v cc =15v fi gure 30. i r 2181s vs. frequency (i rfbc30), r gate =22 ? , v cc =15v fi gure 31. i r 2181s vs. frequency (i rfbc40), r gate =15 ? , v cc =15v
IR2184 ( 4 )(s) & (pbf) 20 www.irf.com 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) tempreture ( o c) 14 0 v 70v 0v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v figure 35. ir21814s vs. freque ncy (irfbc40), r gate =15 ? , v cc =15v figure 34. ir21814s vs. fre que ncy (irfbc30), r gate =22 ? , v cc =15v figure 33. ir21814s vs. frequency (irfbc20), r gate =33 ? , v cc =15v figure 32. ir2181s vs . fre quency (irfpe50), r gate =10 ? , v cc =15v
IR2184 ( 4 )(s) & (pbf) www.irf.com 21 20 40 60 80 100 120 140 1 10 100 1000 frequency (khz) temperature ( o c) 140v 70v 0v figure 36. ir21814s vs. freque ncy (irfpe50), r gate =10 ? , v cc =15v
IR2184 ( 4 )(s) & (pbf) 22 www.irf.com 01-6014 01-3003 01 (ms-001ab) 8-lead pdip 01-6027 01-0021 11 (ms-012aa) 8-lead soic 87 5 65 d b e a e 6x h 0.25 [.010] a 6 4 3 12 4. outline conforms to jedec outline ms-012aa. notes: 1. dimensioning & toleranc ing per asme y14.5m-1994. 2. controlling dimension: millimeter 3. dimensions are shown in millimeters [inches]. 7 k x 45 8x l 8x c y footprint 8x 0.72 [.028] 6.46 [.255] 3x 1.27 [.050] 8x 1.78 [.070] 5 dimension does not include mold protrusions. 6 dimension does not include mold protrusions. mold protrusions no t to exc eed 0.25 [.010]. 7 dimension is the length of lead for soldering to a substrate. mold protrusions no t to exc eed 0.15 [.006]. 0.25 [.010] cab e1 a a1 8x b c 0.10 [.004] e1 d e y b a a1 h k l .189 .1497 0 .013 .050 basic .0532 .0040 .2284 .0099 .016 .1968 .1574 8 .020 .0688 .0098 .2440 .0196 .050 4.80 3.80 0.33 1.35 0.10 5.80 0.25 0.40 0 1.27 basic 5.00 4.00 0.51 1.75 0.25 6.20 0.50 1.27 min max millimeters in c h e s min max dim 8 e c .0075 .0098 0.19 0.25 .025 basic 0.635 basic
IR2184 ( 4 )(s) & (pbf) www.irf.com 23 01-6019 01-3063 00 (ms-012ab) 14-lead soic (narrow body) 01-6010 01-3002 03 (ms-001ac) 14-lead pdip
IR2184 ( 4 )(s) & (pbf) 24 www.irf.com basic part (non-lead free) 8-lead pdip IR2184 order IR2184 8-lead soic IR2184s order IR2184s 14-lead pdip IR21844 order IR21844 14-lead soic IR21844 order IR21844s leadfree part 8-lead pdip IR2184 order IR2184pbf 8-lead soic IR2184s order IR2184spbf 14-lead pdip IR21844 order IR21844pbf 14-lead soic IR21844 order IR21844spbf order information leadfree part marking information lead free released non-lead free released part number date code irxxxxxx yww? ?xxxx pin 1 identifier ir logo lot code (prod mode - 4 digit spn code) assembly site code per scop 200-002 p ? marking code thisproduct has been designed and qualified for the industrial market. qualification standards can be found on ir?s web site http://www.irf.com data and specifications subject to change without notice. ir world headquarters: 233 kansas st., el segundo, california 90245 tel: (310) 252-7105 4/4/2006

▲Up To Search▲

Price & Availability of IR2184

	To Download IR2184 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .